AMDGPU/GlobalISel: Custom lower control flow intrinsics
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Mon, 1 Jul 2019 18:40:23 +0000 (18:40 +0000)
committerMatt Arsenault <Matthew.Arsenault@amd.com>
Mon, 1 Jul 2019 18:40:23 +0000 (18:40 +0000)
commite15770aec4278d6b0f3f400dd54bf45628364db1
tree700c7b668bf1df294c210e884c338da46566ca57
parent4073b33786c6e1f976c68bb6615e7332f110a35e
AMDGPU/GlobalISel: Custom lower control flow intrinsics

Replace the brcond for the 2 cases that act as branches. For now
follow how the current system works, although I think we can
eventually get rid of the pseudos.

llvm-svn: 364832
llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-amdgcn.if-invalid.mir [new file with mode: 0644]
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-brcond.mir