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(parent: 8c07131) | patch
clk: samsung: add new clocks for Exynos5422 SoC
authorLukasz Luba <l.luba@partner.samsung.com>
Fri, 11 Jan 2019 18:09:33 +0000 (19:09 +0100)
committerJunghoon Kim <jhoon20.kim@samsung.com>
Thu, 14 Feb 2019 05:58:08 +0000 (14:58 +0900)
commite113af668fe4b17a23c825baf4dd4c19911ecc64
tree6d5f93e5e84f58e2e821c069f2230927c0326028tree | snapshot
parent8c07131c0756ef0ae17132d36706d212db87e34ecommit | diff
clk: samsung: add new clocks for Exynos5422 SoC

This patch provides support for clocks needed for Dynamic Memory Controller
in Exynos5422. It also defines new PLL rates for BPLL which is used
for DMC.

Change-Id: I85d151a19a176ef5ea8057b49b0afbfb778fe5a9
Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com>
drivers/clk/samsung/clk-exynos5420.c diff | blob | history
Domain: System / Kernel;