mmc: zynq: Determine base clock frequency via clock framework
authorStefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Tue, 17 Jan 2017 15:27:32 +0000 (16:27 +0100)
committerMichal Simek <michal.simek@xilinx.com>
Fri, 17 Feb 2017 09:22:47 +0000 (10:22 +0100)
commite0f4de1afcdb80b4ccad10a877504baaeb7ae2c0
tree911cc97dee3dde4f05eaff6c3c2c84b3041baffb
parent9bb803d5b090293821d1181fe9576c89c7928ec1
mmc: zynq: Determine base clock frequency via clock framework

The zynq_sdhci controller driver use CONFIG_ZYNQ_SDHCI_MAX_FREQ as base
clock frequency but this clock is not fixed and depends on the hardware
configuration. Additionally the value of CONFIG_ZYNQ_SDHCI_MAX_FREQ
doesn't match the real base clock frequency of SDIO_FREQ. Use the clock
framework to determine the frequency at run time.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
drivers/mmc/zynq_sdhci.c