dmaengine: stm32-dma: take address into account when computing max width
authorAmelie Delaunay <amelie.delaunay@st.com>
Fri, 20 Nov 2020 14:33:19 +0000 (15:33 +0100)
committerVinod Koul <vkoul@kernel.org>
Fri, 11 Dec 2020 15:43:08 +0000 (21:13 +0530)
commite0ebdbdcb42a66f49b7587dc50cc6f528ec55cad
tree579c34397afd3f4551462f47fab13e66e0824186
parent5d4d4dfbda18063231a95dea28fdeab148f23301
dmaengine: stm32-dma: take address into account when computing max width

DMA_SxPAR or DMA_SxM0AR/M1AR registers have to be aligned on PSIZE or MSIZE
respectively. This means that bus width needs to be forced to 1 byte when
computed width is not aligned with address.

Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Link: https://lore.kernel.org/r/20201120143320.30367-4-amelie.delaunay@st.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
drivers/dma/stm32-dma.c