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(parent: 0c1fd90) | patch
[NVPTX] Expose float tys min, max, abs, neg as builtins
authorJakub Chlanda <j.chlanda@gmail.com>
Tue, 22 Feb 2022 22:42:15 +0000 (14:42 -0800)
committerArtem Belevich <tra@google.com>
Wed, 23 Feb 2022 21:56:53 +0000 (13:56 -0800)
commite0dc4ac28f0080a10a51a4627c880ca795f07ba0
treecfb646926a25245261d4db4e30ed211c07544732tree | snapshot
parent0c1fd90fe0828aa87518d9be542bd00d36d258d7commit | diff
[NVPTX] Expose float tys min, max, abs, neg as builtins

Adds support for the following builtins:

- abs, neg:
- .bf16,
- .bf16x2
- min, max
- {.ftz}{.NaN}{.xorsign.abs}.f16
- {.ftz}{.NaN}{.xorsign.abs}.f16x2
- {.NaN}{.xorsign.abs}.bf16
- {.NaN}{.xorsign.abs}.bf16x2
- {.ftz}{.NaN}{.xorsign.abs}.f32

Differential Revision: https://reviews.llvm.org/D117887
llvm/include/llvm/IR/IntrinsicsNVVM.td diff | blob | history
llvm/lib/Target/NVPTX/NVPTXInstrInfo.td diff | blob | history
llvm/lib/Target/NVPTX/NVPTXIntrinsics.td diff | blob | history
llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp diff | blob | history
llvm/test/CodeGen/NVPTX/math-intrins-sm80-ptx70-instcombine.ll [new file with mode: 0644] blob
llvm/test/CodeGen/NVPTX/math-intrins-sm80-ptx70.ll [new file with mode: 0644] blob
llvm/test/CodeGen/NVPTX/math-intrins-sm86-ptx72.ll [new file with mode: 0644] blob
Domain: System / Toolchain;