drm/i915/guc: Early initialization of GuC send registers
authorMichal Wajdeczko <michal.wajdeczko@intel.com>
Thu, 3 Jun 2021 05:16:29 +0000 (22:16 -0700)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Fri, 4 Jun 2021 08:42:25 +0000 (10:42 +0200)
commite09be87af54f703a67f6b573f6a12b8349c5c8f5
tree2a0bfc32cf72328aa5a2ab5d046f564437a66200
parent8d99e09c5d1c20a3763e84d5f09619fa33e33186
drm/i915/guc: Early initialization of GuC send registers

Base offset and count of the GuC scratch registers, used for
sending MMIO messages to GuC, can be initialized earlier with
other GuC members that also depends on platform.

Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: https://patchwork.freedesktop.org/patch/msgid/20210603051630.2635-20-matthew.brost@intel.com
drivers/gpu/drm/i915/gt/uc/intel_guc.c