aarch64: Use RTL builtins for [su]mlsl_lane[q] intrinsics

aarch64: Use RTL builtins for [su]mlsl_lane[q] intrinsics

Rewrite [su]mlsl_lane[q] Neon intrinsics to use RTL builtins rather
than inline assembly code, allowing for better scheduling and
optimization.

gcc/ChangeLog:

2021-01-28  Jonathan Wright  <jonathan.wright@arm.com>

	* config/aarch64/aarch64-simd-builtins.def: Add [su]mlsl_lane[q]
	builtin generator macros.
	* config/aarch64/aarch64-simd.md (aarch64_vec_<su>mlsl_lane<Qlane>):
	Define.
	* config/aarch64/arm_neon.h (vmlsl_lane_s16): Use RTL builtin
	instead of inline asm.
	(vmlsl_lane_s32): Likewise.
	(vmlsl_lane_u16): Likewise.
	(vmlsl_lane_u32): Likewise.
	(vmlsl_laneq_s16): Likewise.
	(vmlsl_laneq_s32): Likewise.
	(vmlsl_laneq_u16): Likewise.
	(vmlsl_laneq_u32): Likewise.