arm64: dts: zynqmp: Rename buses to be align with simple-bus yaml
authorMichal Simek <michal.simek@xilinx.com>
Mon, 24 Aug 2020 10:05:42 +0000 (12:05 +0200)
committerMichal Simek <michal.simek@xilinx.com>
Tue, 29 Sep 2020 10:58:38 +0000 (12:58 +0200)
commitdfff9066e60ee8670424cfedf4269d3b51c5100f
tree3f86cf754e9acd535b22418594dcc23f550642eb
parentcbf5a878aea9ccd0236c99f028080e099365c65d
arm64: dts: zynqmp: Rename buses to be align with simple-bus yaml

Rename amba-apu and amba to AXI. Based on Xilinx ZynqMP TRM (Chapter 15)
chip is "using the advanced eXtensible interface (AXI) point-to-point
channels for communicating addresses, data, and response transactions
between master and slave clients."

Issues are reported as:
...: amba: $nodename:0: 'amba' does not match
'^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
From schema: .../dt-schema/dtschema/schemas/simple-bus.yaml
...: amba-apu@0: $nodename:0: 'amba-apu@0' does not match
'^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
From schema: .../dt-schema/dtschema/schemas/simple-bus.yaml

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/68f20a2b2bb0feee80bc3348619c2ee98aa69963.1598263539.git.michal.simek@xilinx.com
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
arch/arm64/boot/dts/xilinx/zynqmp.dtsi