clk: agilex/stratix10/n5x: fix how the bypass_reg is handled
authorDinh Nguyen <dinguyen@kernel.org>
Fri, 11 Jun 2021 02:52:01 +0000 (21:52 -0500)
committerStephen Boyd <sboyd@kernel.org>
Sun, 27 Jun 2021 23:39:59 +0000 (16:39 -0700)
commitdfd1427c3769ba51297777dbb296f1802d72dbf6
treef525981e9a14e1994ed19e89cee906a460870f4e
parentc2c9c5661a48bf2e67dcb4e989003144304acd6a
clk: agilex/stratix10/n5x: fix how the bypass_reg is handled

If the bypass_reg is set, then we can return the bypass parent, however,
if there is not a bypass_reg, we need to figure what the correct parent
mux is.

The previous code never handled the parent mux if there was a
bypass_reg.

Fixes: 80c6b7a0894f ("clk: socfpga: agilex: add clock driver for the Agilex platform")
Cc: stable@vger.kernel.org
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Link: https://lore.kernel.org/r/20210611025201.118799-4-dinguyen@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/socfpga/clk-periph-s10.c