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[X86] Allow zextload/extload i1->i8 to be folded into instructions during isel
authorCraig Topper <craig.topper@intel.com>
Mon, 12 Feb 2018 01:33:36 +0000 (01:33 +0000)
committerCraig Topper <craig.topper@intel.com>
Mon, 12 Feb 2018 01:33:36 +0000 (01:33 +0000)
commitdfc322ddf4542d34d3fffb5f5813c1a94bd3717f
tree44c74134bbfd9efbb617c7c02a7ebd0b9d256b10tree | snapshot
parentd061dd06e8cdfbc25f484320087c5bb52236edd2commit | diff
[X86] Allow zextload/extload i1->i8 to be folded into instructions during isel

Previously we just emitted this as a MOV8rm which would likely get folded during the peephole pass anyway. This just makes it explicit earlier.

The gpr-to-mask.ll test changed because the kaddb instruction has no memory form.

llvm-svn: 324860
llvm/lib/Target/X86/X86InstrInfo.td diff | blob | history
llvm/test/CodeGen/X86/gpr-to-mask.ll diff | blob | history
Domain: System / Toolchain;