[AMDGPU] Assembler: Support DPP instructions.
authorSam Kolton <Sam.Kolton@amd.com>
Wed, 9 Mar 2016 12:29:31 +0000 (12:29 +0000)
committerSam Kolton <Sam.Kolton@amd.com>
Wed, 9 Mar 2016 12:29:31 +0000 (12:29 +0000)
commitdfa29f7c5bfc45bcc9a31bb113b1519d1332b6a6
tree5f7e7d7ac194e0510028d40818e6a734cff259f5
parent10d6f9ac0403710fefaee324bfccd2a01e41a6c3
[AMDGPU] Assembler: Support DPP instructions.

Supprot DPP syntax as used in SP3 (except several operands syntax).
Added dpp-specific operands in td-files.
Added DPP flag to TSFlags to determine if instruction is dpp in InstPrinter.
Support for VOP2 DPP instructions in td-files.
Some tests for DPP instructions.

ToDo:
  - VOP2bInst:
    - vcc is considered as operand
    - AsmMatcher doesn't apply mnemonic aliases when parsing operands
  - v_mac_f32
  - v_nop
  - disable instructions with 64-bit operands
  - change dpp_ctrl assembler representation to conform sp3

Review: http://reviews.llvm.org/D17804
llvm-svn: 263008
llvm/include/llvm/IR/IntrinsicsAMDGPU.td
llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
llvm/lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.cpp
llvm/lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.h
llvm/lib/Target/AMDGPU/SIDefines.h
llvm/lib/Target/AMDGPU/SIInstrFormats.td
llvm/lib/Target/AMDGPU/SIInstrInfo.td
llvm/lib/Target/AMDGPU/VIInstrFormats.td
llvm/lib/Target/AMDGPU/VIInstructions.td
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mov.dpp.ll
llvm/test/MC/AMDGPU/vop_dpp.s [new file with mode: 0644]