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(parent: 1dd0613) | patch
[SVE] Extend getMemVTFromNode to cover the sret variants of sve.ld2/3/4.
authorPaul Walker <paul.walker@arm.com>
Mon, 22 Aug 2022 16:19:48 +0000 (17:19 +0100)
committerPaul Walker <paul.walker@arm.com>
Tue, 8 Nov 2022 18:41:15 +0000 (18:41 +0000)
commitdf8e0ce59248822029aa8deafb8e6ff5a5eb5424
treeb8f5f4bd41a4a6be2ce62e162b89fbeb4fa5617ftree | snapshot
parent1dd0613810ff0dd197b50488512d5b58b0020292commit | diff
[SVE] Extend getMemVTFromNode to cover the sret variants of sve.ld2/3/4.

This enables the use of reg+imm addressing modes to match the
non-sret variants of these intrinsics.

Differential Revision: https://reviews.llvm.org/D132392
llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp diff | blob | history
llvm/test/CodeGen/AArch64/sve-intrinsics-ldN-sret-reg+imm-addr-mode.ll diff | blob | history
Domain: System / Toolchain;