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(parent: 29e3067) | patch
clk: k210: Don't set PLL rates if we are already at the correct rate
authorSean Anderson <seanga2@gmail.com>
Fri, 11 Jun 2021 04:16:12 +0000 (00:16 -0400)
committerLeo Yu-Chi Liang <ycliang@andestech.com>
Thu, 17 Jun 2021 01:40:57 +0000 (09:40 +0800)
commitdf79e2b48baa2f3434645b0c74cda01d67a126e7
tree56c92d27789945553b2b663491485dbc741824betree | snapshot
parent29e3067d911b498c9676a695312fa3d3e83a7e4fcommit | diff
clk: k210: Don't set PLL rates if we are already at the correct rate

This speeds up boot by preventing multiple reconfigurations of the PLLs.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
drivers/clk/kendryte/clk.c diff | blob | history
Domain: System / Kernel;