projects / platform / upstream / mesa.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 0c550a5) | patch
radv: do not load/store the clear value for comp-to-single images
authorSamuel Pitoiset <samuel.pitoiset@gmail.com>
Thu, 26 Aug 2021 16:00:39 +0000 (18:00 +0200)
committerMarge Bot <eric+marge@anholt.net>
Mon, 30 Aug 2021 07:18:19 +0000 (07:18 +0000)
commitdf688e6941bc89ae1ba9cdc53fc464cc36652551
treeb633b2a4d7fc47f2df2b7fb0227086727f23e1f3tree | snapshot
parent0c550a5fe69271cb01026a3f05d1c918e6552b04commit | diff
radv: do not load/store the clear value for comp-to-single images

Images that are fast cleared with the comp-to-single mode clears DCC
to 0x10 which tells the hardware to get the clear value from the
main surface instead of the reg.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12565>
src/amd/vulkan/radv_cmd_buffer.c diff | blob | history
Domain: Graphics System / GL;