author | Matt Arsenault <Matthew.Arsenault@amd.com> | |
Tue, 24 Dec 2019 00:42:53 +0000 (19:42 -0500) | ||
committer | Matt Arsenault <arsenm2@gmail.com> | |
Tue, 24 Dec 2019 14:53:01 +0000 (09:53 -0500) | ||
commit | df5c2159d0a8a6d025504779f96e58e393b44c1f | |
tree | 7fcd4bb8a284cbf89fd5cea9a8689c74a294e809 | tree | snapshot |
parent | e351256c0d993afc98ca4d82cd05cf0ae03f147c | commit | diff |
llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | diff | blob | history | |
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fceil.mir | [new file with mode: 0644] | blob |
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fceil.s16.mir | [new file with mode: 0644] | blob |
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-frint.s16.mir | [new file with mode: 0644] | blob |
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-intrinsic-trunc.s16.mir | [new file with mode: 0644] | blob |
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fceil.mir | diff | blob | history | |
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-intrinsic-trunc.mir | diff | blob | history |