[X86][Costmodel] Load/store i16 Stride=4 VF=4 interleaving costs
authorRoman Lebedev <lebedev.ri@gmail.com>
Mon, 27 Sep 2021 19:18:32 +0000 (22:18 +0300)
committerRoman Lebedev <lebedev.ri@gmail.com>
Mon, 27 Sep 2021 19:20:01 +0000 (22:20 +0300)
commitdf2b42d12e4b4ff18bec8460c3d6ede6b411c048
treecbda5da045bd37bef9a1e4f6cff0bc14af80a80b
parent45caac91c4e0caf64ec933f35c4a2d86a3fa31e3
[X86][Costmodel] Load/store i16 Stride=4 VF=4 interleaving costs

The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3

For load we have:
https://godbolt.org/z/rnsf639Wh - for intels `Block RThroughput: =17.0`; for ryzens, `Block RThroughput: <=7.5`
So pick cost of `17`.

For store we have:
https://godbolt.org/z/565KKrcY6 - for intels `Block RThroughput: =6.0`; for ryzens, `Block RThroughput: =2.0`
So pick cost of `6`.

I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D110537
llvm/lib/Target/X86/X86TargetTransformInfo.cpp
llvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-4.ll
llvm/test/Analysis/CostModel/X86/interleaved-store-i16-stride-4.ll