[VTA] add doc to tsim-example driver and update verilator env variable (#3302)
authorLuis Vega <vegaluisjose@users.noreply.github.com>
Fri, 7 Jun 2019 06:52:07 +0000 (23:52 -0700)
committerThierry Moreau <moreau@uw.edu>
Fri, 7 Jun 2019 06:52:06 +0000 (01:52 -0500)
commitdf16182bd8800f023ee0b37c86f3e6af0038413a
treee9c23563565616df1693321e9274e00119662561
parentc4763cd5eea25a3765e661cf5be8f4847e6a59bf
[VTA] add doc to tsim-example driver and update verilator env variable (#3302)

* add documentation and check for extension

* add env variable for verilator include

* fix typo

* this will test if path exist otherwise it won't buid

* check if verilator path and binary is set properly

* add ?

* remove export

* no longer needed
vta/apps/tsim_example/python/tsim/driver.py
vta/hardware/chisel/Makefile