[SLP] respect target register width for GEP vectorization (PR43578)
authorSanjay Patel <spatel@rotateright.com>
Wed, 9 Oct 2019 16:32:49 +0000 (16:32 +0000)
committerSanjay Patel <spatel@rotateright.com>
Wed, 9 Oct 2019 16:32:49 +0000 (16:32 +0000)
commitdf14bd315db94d286c0c75b4b6ee5d760f311399
tree30217dada42bb2f1929d4b60fe6cdda6232f652e
parentd037a5f06538f658f451c5dad106ec02f3cc56c2
[SLP] respect target register width for GEP vectorization (PR43578)

We failed to account for the target register width (max vector factor)
when vectorizing starting from GEPs. This causes vectorization to
proceed to obviously illegal widths as in:
https://bugs.llvm.org/show_bug.cgi?id=43578

For x86, this also means that SLP can produce rogue AVX or AVX512
code even when the user specifies a narrower vector width.

The AArch64 test in ext-trunc.ll appears to be better using the
narrower width. I'm not exactly sure what getelementptr.ll is trying
to do, but it's testing with "-slp-threshold=-18", so I'm not worried
about those diffs. The x86 test is an over-reduction from SPEC h264;
this patch appears to restore the perf loss caused by SLP when using
-march=haswell.

Differential Revision: https://reviews.llvm.org/D68667

llvm-svn: 374183
llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
llvm/test/Transforms/SLPVectorizer/AArch64/ext-trunc.ll
llvm/test/Transforms/SLPVectorizer/AArch64/getelementptr.ll
llvm/test/Transforms/SLPVectorizer/X86/load-merge.ll