clk: exynos5420: Set ID for aclk333 gate clock
authorJavier Martinez Canillas <javier@osg.samsung.com>
Tue, 24 May 2016 17:41:01 +0000 (13:41 -0400)
committerMarek Szyprowski <m.szyprowski@samsung.com>
Thu, 23 Jun 2016 06:08:57 +0000 (08:08 +0200)
commitdecc428cbaebd4252948f31834b35beab626e25f
treee03c75a121dd77ad6c6b70da38f451d0778a6362
parent68ccaadb144d3cc77f9534653ce516a33399853c
clk: exynos5420: Set ID for aclk333 gate clock

The aclk333 clock needs to be ungated during the MFC power domain switch,
so set the clock ID to allow the Exynos power domain logic to lookup this
clock if is defined in the MFC PD device tree node.

Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
[backport of mainline commit 34cba900375ec1751a87d3655ad03b9a5b022362]
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Change-Id: I34cba900375ec1751a87d3655ad03b9a5b022362
drivers/clk/samsung/clk-exynos5420.c