serial: 8250_dw: Improve clock rate setting
authorEd Blake <ed.blake@sondrel.com>
Tue, 26 Sep 2017 10:40:03 +0000 (11:40 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 4 Oct 2017 08:17:27 +0000 (10:17 +0200)
commitde9e33bdfa22e607a88494ff21e9196d00bf4550
tree3fcb9b986e8a22915c88c7cd33206db3389978eb
parent6263368c5b0b758d8639cad37a2a6493c9370425
serial: 8250_dw: Improve clock rate setting

Currently dw8250_set_termios sets the input clock to the nearest
achievable rate to baudx16.  If necessary, the input clock is then
divided down to baudx16 using an integer divider within the UART
device, with the divisor calculated in the 8250 core driver.

However, the clock rate set by dw8250_set_termios and subsequently
divided down could be considerably different to the target baudx16
rate, resulting in incorrect operation.  This patch fixes this by
iteratively searching for an input clock rate that is within +/-1.6%
of an integer multiple of the target baudx16 rate.

Signed-off-by: Ed Blake <ed.blake@sondrel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/tty/serial/8250/8250_dw.c