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[RISCV] Remove redundant test cases for index segment store (5/8).
authorHsiangkai Wang <kai.wang@sifive.com>
Fri, 19 Feb 2021 03:08:01 +0000 (11:08 +0800)
committerHsiangkai Wang <kai.wang@sifive.com>
Fri, 19 Feb 2021 03:56:08 +0000 (11:56 +0800)
commitde6d640f6d21d78344b6a834f03148963b8a6f5c
tree437907e3fb5ac5f794081dcdd3d4d1ffa5bfc11etree | snapshot
parent3b4b1c845a4b5e329065f59cb87dce7f528a16fdcommit | diff
[RISCV] Remove redundant test cases for index segment store (5/8).

Differential Revision: https://reviews.llvm.org/D97023
llvm/test/CodeGen/RISCV/rvv/vsoxseg-rv32.ll diff | blob | history
Domain: System / Toolchain;