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(parent: 4509e69) | patch
drm/amd/display: Exit idle optimizations before attempt to access PHY
authorLeo Chen <sancchen@amd.com>
Wed, 12 Jul 2023 20:50:15 +0000 (16:50 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 25 Jul 2023 20:21:54 +0000 (16:21 -0400)
commitde612738e9771bd66aeb20044486c457c512f684
treeec844ed0524029f81a3bf5d22fb4f2cfd4300c20tree | snapshot
parent4509e69a07761d08df7c46d4a08c8222522b1933commit | diff
drm/amd/display: Exit idle optimizations before attempt to access PHY

[Why & How]
DMUB may hang when powering down pixel clocks due to no dprefclk.

It is fixed by exiting idle optimization before the attempt to access PHY.

Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Acked-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Leo Chen <sancchen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c diff | blob | history
Domain: System / Kernel;