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(parent: 37b608a) | patch
arm/ls1021a: Add workaround for DDR erratum A008378
authorYork Sun <yorksun@freescale.com>
Mon, 8 Dec 2014 23:30:55 +0000 (15:30 -0800)
committerYork Sun <yorksun@freescale.com>
Sat, 24 Jan 2015 04:29:13 +0000 (22:29 -0600)
commitdda3b610eee9dcd433627202584ded417327dd51
treede7d6037e6730f3fd9bc2baa086dd74f449d0fd6tree | snapshot
parent37b608a52dcb13312a4f7ccea199cd6bac76d298commit | diff
arm/ls1021a: Add workaround for DDR erratum A008378

Internal memory controller counters can reach a bad state after
training in DDR4 mode if accumulated ECC or DBI mode is eanbled.

Signed-off-by: York Sun <yorksun@freescale.com>
arch/arm/include/asm/arch-ls102xa/config.h diff | blob | history
drivers/ddr/fsl/fsl_ddr_gen4.c diff | blob | history
include/fsl_ddr.h diff | blob | history
Domain: System / Kernel;