drm/amd/display: Do DIO FIFO enable after DP video stream enable
authorNicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Wed, 7 Sep 2022 14:11:34 +0000 (10:11 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 27 Sep 2022 21:55:44 +0000 (17:55 -0400)
commitdd37fba90e72a48998d9f0eb5497088ea2b02ad1
tree140d113cca74ec639a45c4f5f5888a4935ad7508
parentb6d1c39bc637fe4879d610e6687b1d4224c4b2fb
drm/amd/display: Do DIO FIFO enable after DP video stream enable

[Why]
Avoids a race condition where DIO FIFO can underflow due to no incoming
data available.

[How]
Shift the FIFO enable below stream enable.

Make sure fullness level is written before the DIO reset takes place
and that we're not doing it twice.

Reviewed-by: Syed Hassan <Syed.Hassan@amd.com>
Acked-by: Jasdeep Dhillon <jdhillon@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dcn314/dcn314_dio_stream_encoder.c