85xx: socrates: fix DDR SDRAM tlb entry configuration
authorAnatolij Gustschin <agust@denx.de>
Thu, 13 Nov 2008 17:08:57 +0000 (18:08 +0100)
committerAndrew Fleming-AFLEMING <afleming@freescale.com>
Thu, 4 Dec 2008 04:47:01 +0000 (22:47 -0600)
commitdd332e18d082de75eca3fc2c7c778f5d4571a096
tree94b5fe6ea33556610852de749ffb9ccb8450511c
parenta2cd50ed6ef0ac6b127b3d6db756979a8336718d
85xx: socrates: fix DDR SDRAM tlb entry configuration

since commit be0bd8234b9777ecd63c4c686f72af070d886517
tlb entry for socrates DDR SDRAM will be reconfigured
by setup_ddr_tlbs() from initdram() causing an
inconsistency with previously configured DDR SDRAM tlb
entry from tlb_table:

socrates>l2cam 7 9
IDX  PID      EPN  SIZE V TS           RPN U0-U3 WIMGE UUUSSS
  7 : 00 00000000 256MB V  0 -> 0_00000000  0000 -I-G- ---RWX
  8 : 00 00000000 256MB V  0 -> 0_00000000  0000 ----- ---RWX
  9 : 00 10000000 256MB V  0 -> 0_10000000  0000 ----- ---RWX

This patch makes the presence of the DDR SDRAM tlb entry in
the tlb_table dependent on CONFIG_SPD_EEPROM to avoid this
inconsistency.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Acked-by: Andy Fleming <afleming@freescale.com>
board/socrates/tlb.c