drm/i915: use gtfifodbg
authorBen Widawsky <ben@bwidawsk.net>
Thu, 9 Feb 2012 09:15:18 +0000 (10:15 +0100)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Sat, 11 Feb 2012 23:21:16 +0000 (00:21 +0100)
commitdd202c6dd612beecf87b8b85c2f09b23f77364a2
tree2b4a3b103f81b5da0514b34224efd2055fc65797
parent5f7f726d2caf1e51a39872e5a30b6984235d388e
drm/i915: use gtfifodbg

Add register definitions for GTFIFODBG, and clear it during init time to
make sure state is correct.

This register tells us if either a read, or a write occurred while the
fifo was full. It seems like bit 2 is an OR of bit 0 and bit 1, so we
check that as well, but the documents are not quite clear.

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by (v1): Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/intel_display.c