Generate more compact XOR on 64-bit architecture when using xor to zero out registers.

Generate more compact XOR on 64-bit architecture when using xor to zero out registers.

When using xor to zero a 64-bit register, generate 32-bit instruction instead.
(according to Intel 64-bit mode coding guidelines)

previous code for zeroing RAX:
  xor rax, rax

==>

new code for zeroing RAX:
  xor eax, eax

The 32-bit operand form has the same semantics: It also zeroes the upper
32-bit of rax and its encoding uses 1 byte less.

Review URL: http://codereview.chromium.org/330018

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3132 ce2b1a6d-e550-0410-aec6-3dcde31c8c00