[mips] [IAS] Add support for the XOR $reg,imm pseudo-instruction.
authorToma Tabacu <toma.tabacu@imgtec.com>
Tue, 17 Mar 2015 13:17:44 +0000 (13:17 +0000)
committerToma Tabacu <toma.tabacu@imgtec.com>
Tue, 17 Mar 2015 13:17:44 +0000 (13:17 +0000)
commitdcebf5b901972005dccbe0854fb3203a6bfdae6e
tree24f002f66940a1db9d36f9cb97550bd077f5d946
parent51067848e79da93c231a0c47f517541858d4be2d
[mips] [IAS] Add support for the XOR $reg,imm pseudo-instruction.

Summary:
This adds a MipsInstAlias which expands to XORi $reg,$reg,imm. For example, "xor $6, 0x3A" should be expanded to "xori $6, $6, 58".
This should work for all MIPS ISAs.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8284

llvm-svn: 232473
16 files changed:
llvm/lib/Target/Mips/MipsInstrInfo.td
llvm/test/MC/Mips/mips1/valid.s
llvm/test/MC/Mips/mips2/valid.s
llvm/test/MC/Mips/mips3/valid.s
llvm/test/MC/Mips/mips32/valid.s
llvm/test/MC/Mips/mips32r2/valid.s
llvm/test/MC/Mips/mips32r3/valid.s
llvm/test/MC/Mips/mips32r5/valid.s
llvm/test/MC/Mips/mips32r6/valid.s
llvm/test/MC/Mips/mips4/valid.s
llvm/test/MC/Mips/mips5/valid.s
llvm/test/MC/Mips/mips64/valid.s
llvm/test/MC/Mips/mips64r2/valid.s
llvm/test/MC/Mips/mips64r3/valid.s
llvm/test/MC/Mips/mips64r5/valid.s
llvm/test/MC/Mips/mips64r6/valid.s