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[X86][AVX2] Hide VPBLENDD instructions behind AVX2 predicate
authorSimon Pilgrim <llvm-dev@redking.me.uk>
Tue, 19 Feb 2019 17:23:55 +0000 (17:23 +0000)
committerSimon Pilgrim <llvm-dev@redking.me.uk>
Tue, 19 Feb 2019 17:23:55 +0000 (17:23 +0000)
commitdce9c2a8119c7eb3dd34bc8178e54dd609e6d785
tree2c738f90229389dcfece5dc5632cae130e988674tree | snapshot
parent51a2e889908b63b1e6c1a79ef68d7dd0d49e3ef2commit | diff
[X86][AVX2] Hide VPBLENDD instructions behind AVX2 predicate

This was the cause of the regression in D57888 - the commuted load pattern wasn't hidden by the predicate so once we enabled v4i32 blends on SSE41+ targets then isel was incorrectly matched against AVX2+ instructions.

llvm-svn: 354358
llvm/lib/Target/X86/X86InstrSSE.td diff | blob | history
Domain: System / Toolchain;