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(parent: 1ad23a4) | patch
[X86][BtVer2] Fixed the number of micro opcodes for AVX vector converts and
authorAndrea Di Biagio <Andrea_DiBiagio@sn.scee.net>
Fri, 30 Mar 2018 18:53:47 +0000 (18:53 +0000)
committerAndrea Di Biagio <Andrea_DiBiagio@sn.scee.net>
Fri, 30 Mar 2018 18:53:47 +0000 (18:53 +0000)
commitdc97172b2fb7452bdd9e841e4b2d5049fbdd9275
tree9c3a76dac287ec99f3b6e06087366ef5baa5c1b7tree | snapshot
parent1ad23a494bebf71a9a214766737b76f092e61a7bcommit | diff
[X86][BtVer2] Fixed the number of micro opcodes for AVX vector converts and
VSQRT instructions.

There were still a few AVX instructions with an incorrect number of opcodes.
These should be fixed now.

llvm-svn: 328892
llvm/lib/Target/X86/X86ScheduleBtVer2.td diff | blob | history
llvm/test/tools/llvm-mca/X86/BtVer2/resources-avx1.s diff | blob | history
Domain: System / Toolchain;