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(parent: 8925dbd) | patch
clk: meson: axg: spread spectrum is on mpll2
authorJerome Brunet <jbrunet@baylibre.com>
Mon, 13 May 2019 12:31:11 +0000 (14:31 +0200)
committerJerome Brunet <jbrunet@baylibre.com>
Mon, 20 May 2019 10:18:55 +0000 (12:18 +0200)
commitdc4e62d373f881cbf51513296a6db7806516a01a
tree188605959275fc3943f12417ec03e53506d79c18tree | snapshot
parent8925dbd03bb29b1b0de30ac4e02c18faf8ddc9dbcommit | diff
clk: meson: axg: spread spectrum is on mpll2

After testing, it appears that the SSEN bit controls the spread
spectrum function on MPLL2, not MPLL0.

Fixes: 78b4af312f91 ("clk: meson-axg: add clock controller drivers")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
drivers/clk/meson/axg.c diff | blob | history
Domain: System / Kernel;