net/mlx5: Lag, add support to create definers for LAG
authorMaor Gottlieb <maorg@nvidia.com>
Tue, 17 Aug 2021 07:24:05 +0000 (10:24 +0300)
committerSaeed Mahameed <saeedm@nvidia.com>
Tue, 19 Oct 2021 03:18:09 +0000 (20:18 -0700)
commitdc48516ec7d369c6b80bf9f14d774287b6c428aa
tree731b075d73325580d78561e2883eb97208ef1a1a
parente465550b38edd71e233520d01b2d5db91d0ae077
net/mlx5: Lag, add support to create definers for LAG

Every definer will consist of a flow table with a single hash group
with exactly two flow table entries, one for each device port.
The destination of these entries is the uplink vport according to the
port state and hash policy.

Signed-off-by: Maor Gottlieb <maorg@nvidia.com>
Reviewed-by: Mark Bloch <mbloch@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
drivers/net/ethernet/mellanox/mlx5/core/lag/lag.c
drivers/net/ethernet/mellanox/mlx5/core/lag/lag.h
drivers/net/ethernet/mellanox/mlx5/core/lag/port_sel.c
drivers/net/ethernet/mellanox/mlx5/core/lag/port_sel.h