projects / platform / kernel / linux-rpi.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 8c2ffd9) | patch
riscv: fix accessing 8-byte variable from RV32
authorAlan Kao <alankao@andestech.com>
Fri, 22 Mar 2019 06:37:04 +0000 (14:37 +0800)
committerPalmer Dabbelt <palmer@sifive.com>
Wed, 27 Mar 2019 01:24:51 +0000 (18:24 -0700)
commitdbee9c9c45846f003ec2f819710c2f4835630a6a
tree8705ac53d89ebe72dcac442615db2a96ddac09f6tree | snapshot
parent8c2ffd9174779014c3fe1f96d9dc3641d9175f00commit | diff
riscv: fix accessing 8-byte variable from RV32

A memory save operation to 8-byte variable in RV32 is divided into
two sw instructions in the put_user macro.  The current fixup returns
execution flow to the second sw instead of the one after it.

This patch fixes this fixup code according to the load access part.

Signed-off-by: Alan Kao<alankao@andestech.com>
Cc: Greentime Hu <greentime@andestech.com>
Cc: Vincent Chen <deanbo422@gmail.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
arch/riscv/include/asm/uaccess.h diff | blob | history
Domain: System / Kernel;