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(parent: 78e418d) | patch
drm/i915: Fix cs timestamp frequency for cl/bw
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Mon, 31 Oct 2022 13:57:00 +0000 (15:57 +0200)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Wed, 2 Nov 2022 06:53:59 +0000 (08:53 +0200)
commitdbea79a50221899e2c3b4be9967f535e89fd6d00
treed82673ad267d716704810e0dfa7df4b69ba4cdf5tree | snapshot
parent78e418d0ea7f74bca0c2312281a28de831ae8edfcommit | diff
drm/i915: Fix cs timestamp frequency for cl/bw

Despite what the spec says the TIMESTAMP register seems to
tick once every hrawclk (confirmed on i965gm and g35).

v2: Rebase

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20221031135703.14670-4-ville.syrjala@linux.intel.com
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
drivers/gpu/drm/i915/gt/intel_gt_clock_utils.c diff | blob | history
Domain: System / Kernel;