drm/i915: Move HSW/BDW pll selection logic to intel_dpll_mgr.c
authorAnder Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Tue, 8 Mar 2016 15:46:23 +0000 (17:46 +0200)
committerAnder Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Wed, 9 Mar 2016 09:55:31 +0000 (11:55 +0200)
commitdaedf20a4f69685a636c9104cf6f1f5d8835345b
treeb63a425c0537213fd22da74466f6a8f650114ebf
parentf9476a6c6d0c33cbce271ea08a3fbef131c73dc0
drm/i915: Move HSW/BDW pll selection logic to intel_dpll_mgr.c

Move the code for selecting and configuring HSW/BDW DDI PLLs into the
shared dpll infrastructure. With this most of the PLL selection logic
for those platforms is in one place. DisplayPort is handled separately,
but that should be fixed on a follow up patch. It also allows a small
clean up of the SPLL logic.

v2: Rebase.

Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1457451987-17466-10-git-send-email-ander.conselvan.de.oliveira@intel.com
drivers/gpu/drm/i915/intel_crt.c
drivers/gpu/drm/i915/intel_ddi.c
drivers/gpu/drm/i915/intel_display.c
drivers/gpu/drm/i915/intel_dpll_mgr.c
drivers/gpu/drm/i915/intel_dpll_mgr.h