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(parent: 5966d15) | patch
[AArch64] CCSIDR2 system register
authorSam Parker <sam.parker@arm.com>
Wed, 20 Dec 2017 08:56:41 +0000 (08:56 +0000)
committerSam Parker <sam.parker@arm.com>
Wed, 20 Dec 2017 08:56:41 +0000 (08:56 +0000)
commitdaed9de6223a8dbbe83c2d454186c912e5bdb4b1
treeb0c0d242e8a4a62d085867b9ff697630f0b4439ctree | snapshot
parent5966d15943adb2064ae7349c5083464a742d8d81commit | diff
[AArch64] CCSIDR2 system register

Implement the 'Current Cache Size' register that has been introduced
as part of the Armv8.3 architecture. I originally missed this, and
(hopefully) should be the final patch for assembler support.

Differential Revision: https://reviews.llvm.org/D41396

llvm-svn: 321155
llvm/lib/Target/AArch64/AArch64SystemOperands.td diff | blob | history
llvm/test/MC/AArch64/arm64-system-encoding.s diff | blob | history
llvm/test/MC/AArch64/basic-a64-diagnostics.s diff | blob | history
llvm/test/MC/Disassembler/AArch64/basic-a64-instructions.txt diff | blob | history
Domain: System / Toolchain;