riscv: hwcap: Don't alphabetize ISA extension IDs
authorAndrew Jones <ajones@ventanamicro.com>
Thu, 9 Feb 2023 12:36:36 +0000 (13:36 +0100)
committerPalmer Dabbelt <palmer@rivosinc.com>
Wed, 22 Feb 2023 01:21:27 +0000 (17:21 -0800)
commitdac8bf14bb49aecd1de99ebb5498fa03152f2d40
treea419271d1ad321837509f53a81691d122830509a
parent1eac28201ac0725192f5ced34192d281a06692e5
riscv: hwcap: Don't alphabetize ISA extension IDs

While the comment above the ISA extension ID definitions says
"Entries are sorted alphabetically.", this stopped being good
advice with commit d8a3d8a75206 ("riscv: hwcap: make ISA extension
ids can be used in asm"), as we now use macros instead of enums.
Reshuffling defines is error-prone, so, since they don't need to be
in any particular order, change the advice to just adding new
extensions at the bottom. Also, take the opportunity to change
spaces to tabs, merge three comments into one, and move the base
and max defines into more logical locations wrt the ID definitions.

Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20230209123636.123537-1-ajones@ventanamicro.com
Cc: stable@vger.kernel.org
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
arch/riscv/include/asm/hwcap.h