arm64/cpuinfo: Remove references to reserved cache type
authorMark Brown <broonie@kernel.org>
Mon, 4 Jul 2022 17:02:35 +0000 (18:02 +0100)
committerWill Deacon <will@kernel.org>
Tue, 5 Jul 2022 10:45:45 +0000 (11:45 +0100)
commitdabb128debc4e9dcdb71f395f5b32b201f4fd241
tree85fc81ff05644c968a36543af2142410af835af2
parenta111daf0c53ae91e71fd2bfe7497862d14132e3e
arm64/cpuinfo: Remove references to reserved cache type

In 155433cb365ee466 ("arm64: cache: Remove support for ASID-tagged VIVT
I-caches") we removed all the support fir AIVIVT cache types and renamed
all references to the field to say "unknown" since support for AIVIVT
caches was removed from the architecture. Some confusion has resulted since
the corresponding change to the architecture left the value named as
AIVIVT but documented it as reserved in v8, refactor the code so we don't
define the constant instead. This will help with automatic generation of
this register field since it means we care less about the correspondence
with the ARM.

No functional change, the value displayed to userspace is unchanged.

Signed-off-by: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20220704170302.2609529-2-broonie@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
arch/arm64/include/asm/cache.h
arch/arm64/kernel/cpuinfo.c