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(parent: 6f111e9) | patch
Actually allocate the output registers.
authorZack Rusin <zack@tungstengraphics.com>
Thu, 13 Dec 2007 15:32:36 +0000 (10:32 -0500)
committerZack Rusin <zack@tungstengraphics.com>
Thu, 13 Dec 2007 15:33:12 +0000 (10:33 -0500)
commitda89104c576b5b7a0c581a018a8b1c2d770e13c2
tree26679ba8bf0e8193727a219435792f636dc0f9catree | snapshot
parent6f111e9c81a0c28f057092836a3b7fc6100cdb6dcommit | diff
Actually allocate the output registers.

In tgsi the output's will (hopefully) consecutive so this
check (besides not being currently implemented) is not
necessary.
src/mesa/pipe/i965simple/brw_vs_emit.c diff | blob | history
Domain: Graphics System / GL;