re PR target/83926 (ICE during RTL pass: ira, in elimination_costs_in_insn, at reload...
authorPeter Bergner <bergner@vnet.ibm.com>
Fri, 9 Feb 2018 16:32:37 +0000 (10:32 -0600)
committerPeter Bergner <bergner@gcc.gnu.org>
Fri, 9 Feb 2018 16:32:37 +0000 (10:32 -0600)
commitda86c81e6522f9b27cffd04f728e0edd937d09fc
treee435bddb6f077f09144e2a561818abd0302ba4b9
parentcc60cad6155362fe0eca87937bccd75d9fca3ec6
re PR target/83926 (ICE during RTL pass: ira, in elimination_costs_in_insn, at reload1.c:3633)

gcc/
PR target/83926
* config/rs6000/vsx.md (vsx_mul_v2di): Handle generating a 64-bit
multiply in 32-bit mode.
(vsx_div_v2di): Handle generating a 64-bit signed divide in 32-bit mode.
(vsx_udiv_v2di): Handle generating a 64-bit unsigned divide in 32-bit
mode.

gcc/testsuite/
PR target/83926
* gcc.target/powerpc/pr83926.c: New test.
* gcc.target/powerpc/builtins-1-be.c: Filter out gimple folding disabled
message.  Fix test for running in 32-bit mode.

From-SVN: r257531
gcc/ChangeLog
gcc/config/rs6000/vsx.md
gcc/testsuite/ChangeLog
gcc/testsuite/gcc.target/powerpc/builtins-1-be.c
gcc/testsuite/gcc.target/powerpc/pr83926.c [new file with mode: 0644]