clk: mediatek: mt8195: Add support for frequency hopping through FHCTL
authorAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Mon, 6 Feb 2023 10:01:05 +0000 (11:01 +0100)
committerStephen Boyd <sboyd@kernel.org>
Mon, 13 Mar 2023 18:46:45 +0000 (11:46 -0700)
commitda4a82dc67b02da854d50d342386ba3354fb7a04
tree2743600dbbf556662e05ad3632a99370abf0012f
parent4d586e10c428f262b167dd46eefa8b362017a9b1
clk: mediatek: mt8195: Add support for frequency hopping through FHCTL

Add FHCTL parameters and register PLLs through FHCTL to add support
for frequency hopping and SSC. FHCTL will be enabled only on PLLs
specified in devicetree.

This commit brings functional changes only upon addition of
devicetree configuration.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20230206100105.861720-8-angelogioacchino.delregno@collabora.com
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/mediatek/clk-mt8195-apmixedsys.c