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(parent: 3e53032) | patch
ARM: dts: armada-xp: enable L2 cache parity and ecc on db-xc3-24g4xg
authorChris Packham <chris.packham@alliedtelesis.co.nz>
Thu, 26 Sep 2019 23:28:18 +0000 (11:28 +1200)
committerGregory CLEMENT <gregory.clement@bootlin.com>
Tue, 8 Oct 2019 09:48:52 +0000 (11:48 +0200)
commitda29334c751187b0bb89bdfa6c0302697848fa1a
tree0b6d1cde84d1b890b7cd8e4d0c0adbfbe79ea267tree | snapshot
parent3e53032406dfbc17e3866ea660f193433e009cf2commit | diff
ARM: dts: armada-xp: enable L2 cache parity and ecc on db-xc3-24g4xg

Enable L2 cache parity and ECC on the db-xc3-24g4xg board so that cache
operations are protected and errors can be flagged to the EDAC
subsystem.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
arch/arm/boot/dts/armada-xp-db-xc3-24g4xg.dts diff | blob | history
Domain: System / Kernel;