[AArch64] Update SVE scheduling of some CPUs
authorHarvin Iriawan <harvin.iriawan@arm.com>
Mon, 3 Jul 2023 13:41:50 +0000 (14:41 +0100)
committerHarvin Iriawan <harvin.iriawan@arm.com>
Tue, 4 Jul 2023 09:41:56 +0000 (10:41 +0100)
commitd9d9be63a52dc6e908dba8f87d44192ee47ac5f8
tree8a82ab46252d5ef6234c95365957a9c35ffaa1f4
parentc35d2071d8476be00c3453dec7f061cea6f24977
[AArch64] Update SVE scheduling of some CPUs

  * Update cortex-a510 and neoverse-v2 SVE scheduling so that pseudos
have the same instruction latency as original instruction.

  Differential Revision: https://reviews.llvm.org/D154084
llvm/lib/Target/AArch64/AArch64SchedA510.td
llvm/lib/Target/AArch64/AArch64SchedNeoverseV2.td
llvm/unittests/Target/AArch64/AArch64SVESchedPseudoTest.cpp [new file with mode: 0644]
llvm/unittests/Target/AArch64/CMakeLists.txt