dts: socfpga: Add support for SD/MMC on the SOCFPGA platform
authorDinh Nguyen <dinguyen@altera.com>
Tue, 18 Feb 2014 02:31:02 +0000 (20:31 -0600)
committerChris Ball <chris@printf.net>
Thu, 27 Feb 2014 02:30:23 +0000 (21:30 -0500)
commitd9c3f5df539a8a74cc830b35838670fe0541fed1
tree4f8a2158012aa5046b9cce60645d08954a070794
parentec1e5d703e4a75fb19e99a92d20b4b70861bf483
dts: socfpga: Add support for SD/MMC on the SOCFPGA platform

Introduce "altr,socfpga-dw-mshc" to enable Altera's SOCFPGA platform
specific implementation of the dw_mmc driver.

Also add the "syscon" binding to the "altr,sys-mgr" node. The clock
driver can use the syscon driver to toggle the register for the SD/MMC
clock phase shift settings.

Finally, fix an indentation error for the sysmgr node.

Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Acked-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Tested-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Chris Ball <chris@printf.net>
Documentation/devicetree/bindings/mmc/socfpga-dw-mshc.txt [new file with mode: 0644]
arch/arm/boot/dts/socfpga.dtsi
arch/arm/boot/dts/socfpga_arria5.dtsi
arch/arm/boot/dts/socfpga_cyclone5.dtsi
arch/arm/boot/dts/socfpga_vt.dts