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(parent: 4ee2b64) | patch
RISC-V: Add missing privileged spec registers.
authorJim Wilson <jimw@sifive.com>
Thu, 28 Dec 2017 21:21:46 +0000 (13:21 -0800)
committerJim Wilson <jimw@sifive.com>
Thu, 28 Dec 2017 21:21:46 +0000 (13:21 -0800)
commitd9be0c189a9a9b77a6bf4501f8891544b8ce9593
tree57df9c7c0f972e019520498dcfcc25318f03ac0etree | snapshot
parent4ee2b642ddc70393d5b3ab04956fadad02954d4acommit | diff
RISC-V: Add missing privileged spec registers.

gas/
* testsuite/gas/riscv/priv-reg.d, testsuite/gas/riscv/priv-reg.s: New.

include/
* opcode/riscv-opc.h (DECLARE_CSR): Add missing privileged registers.
Sort to match privileged spec documentation order.
(DECLARE_CSR_ALIAS): Add ubadaddr, and comments.
gas/ChangeLog diff | blob | history
gas/testsuite/gas/riscv/priv-reg.d [new file with mode: 0644] blob
gas/testsuite/gas/riscv/priv-reg.s [new file with mode: 0644] blob
include/ChangeLog diff | blob | history
include/opcode/riscv-opc.h diff | blob | history
Domain: System / Toolchain;