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clk: renesas: r9a09g011: Add SDHI/eMMC clock and reset entries
authorPhil Edworthy <phil.edworthy@renesas.com>
Tue, 13 Dec 2022 23:01:26 +0000 (23:01 +0000)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Tue, 27 Dec 2022 08:45:23 +0000 (09:45 +0100)
commitd969103ac89de797fda351aa984f69602b149a72
treef23a8bf17079c189bb81fce80d16f2d45059dceetree | snapshot
parent5edf5b51e760af749c4a8e67cde92db4f3680be5commit | diff
clk: renesas: r9a09g011: Add SDHI/eMMC clock and reset entries

Add SDHI/eMMC clock/reset entries to CPG driver.

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20221213230129.549968-2-fabrizio.castro.jz@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
drivers/clk/renesas/r9a09g011-cpg.c diff | blob | history
Domain: System / Kernel;