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[RISCV] Add isel patterns for sbsetw/sbclrw/sbinvw with sext_inreg as the root.
authorCraig Topper <craig.topper@sifive.com>
Thu, 26 Nov 2020 10:02:38 +0000 (02:02 -0800)
committerCraig Topper <craig.topper@sifive.com>
Thu, 26 Nov 2020 10:03:06 +0000 (02:03 -0800)
commitd9500c2e230e9cc68d3d647864fa824cc3c06b3f
tree47516f88beb68b0ed01773618af4d98c5c3bbf91tree | snapshot
parent8fb8fb2c607794fe4cde69713f2fa556f613dab1commit | diff
[RISCV] Add isel patterns for sbsetw/sbclrw/sbinvw with sext_inreg as the root.

This handles cases were the input isn't known to be sign extended.
llvm/lib/Target/RISCV/RISCVInstrInfoB.td diff | blob | history
llvm/test/CodeGen/RISCV/rv64Zbs.ll diff | blob | history
Domain: System / Toolchain;