[AMDGPU][llvm-mc] Support for 32-bit inline literals
authorTom Stellard <thomas.stellard@amd.com>
Mon, 22 Feb 2016 19:17:56 +0000 (19:17 +0000)
committerTom Stellard <thomas.stellard@amd.com>
Mon, 22 Feb 2016 19:17:56 +0000 (19:17 +0000)
commitd93a34f714827eeb9c84b39549402c9325085b3c
treea5dcbf61807ab3ba46eb133f023e4567ec702bfc
parent82fc153baa79c28e1fa480e9a26eb160272d4ee9
[AMDGPU][llvm-mc] Support for 32-bit inline literals

Patch by: Artem Tamazov

Summary:
Note: Support for 64-bit inline literals TBD
Added: Support of abs/neg modifiers for literals (incomplete; parsing TBD).
Added: Some TODO comments.
Reworked/clarity: rename isInlineImm() to isInlinableImm()
Reworked/robustness: disallow BitsToFloat() with undefined value in isInlinableImm()
Reworked/reuse: isSSrc32/64(), isVSrc32/64()
Tests added.

Reviewers: tstellarAMD, arsenm

Subscribers: vpykhtin, nhaustov, SamWot, arsenm

Projects: #llvm-amdgpu-spb

Differential Revision: http://reviews.llvm.org/D17204

llvm-svn: 261559
llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
llvm/lib/Target/AMDGPU/SIInstrInfo.td
llvm/test/MC/AMDGPU/vop3-errs.s
llvm/test/MC/AMDGPU/vop3.s