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(parent: d9b1c75) | patch
arm64: dts: m3ulcb: enable SCIF clk and pins
authorVladimir Barinov <vladimir.barinov@cogentembedded.com>
Thu, 3 Nov 2016 18:07:20 +0000 (21:07 +0300)
committerSimon Horman <horms+renesas@verge.net.au>
Mon, 21 Nov 2016 09:18:47 +0000 (10:18 +0100)
commitd92ce1a57480e17aff1fb8693cc919bb46a6e0fd
treefba1107d17062481c7117bbb61cdf7c500ea66d0tree | snapshot
parentd9b1c753878310c90e8be178f6a8e119fd0aa25dcommit | diff
arm64: dts: m3ulcb: enable SCIF clk and pins

This enables the external crystal for the SCIF_CLK and its pinctrl, to
be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF.

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts diff | blob | history
Domain: System / Kernel;