[ARM] Fast-Isel was incorrectly selecting <2 x double> adds.
authorPete Cooper <peter_cooper@apple.com>
Wed, 6 May 2015 16:39:17 +0000 (16:39 +0000)
committerPete Cooper <peter_cooper@apple.com>
Wed, 6 May 2015 16:39:17 +0000 (16:39 +0000)
commitd927c6eaf87ac128c320987c4c63dccae2fba4f3
tree6264fa192259856837358f109178e53c43139fa7
parentaed5f3cf7e31886a373b5b62585fb88a6bd85167
[ARM] Fast-Isel was incorrectly selecting <2 x double> adds.

With neon enabled, we reach SelectBinaryFPOp and are able to get registers for a <2 x double> add.

However, we shouldn't actually attempt arithmetic on it as ARMIselLowering says "v2f64 is legal so that QR subregs can be extracted as f64 elements, but neither Neon nor VFP support any arithmetic operations on it."

This commit disables SelectBinaryFPOp for any vector types.  There's already a FIXME to try handle neon.  Doing so would require fixing this conditional which isn't safe for vectors 'VT == MVT::f64 || VT == MVT::i64'

llvm-svn: 236609
llvm/lib/Target/ARM/ARMFastISel.cpp
llvm/test/CodeGen/ARM/fast-isel-vaddd.ll [new file with mode: 0644]